1. Technical Field
The disclosed embodiment relates to a semiconductor integrated circuit, and in particular, to a semiconductor memory apparatus.
2. Related Art
The semiconductor memory apparatus transmits a plurality of parallel data bits over a long distance through a parallel data line called a data bus. The higher the integrated degree of the semiconductor memory apparatus, the narrower the interval between the data lines becomes, such that cross-talk noise between the data lines occurs.
Generally, the data bus is configured to include first to sixth repeaters 10 to 60 as shown in FIG. 1. At this time, for convenience of explanation, only two signal lines are shown in the data bus. Further, data input to the data bus are referred to as input data and data output from the data bus are referred to as output data.
A first input data ‘data_in1’ is output as a first output data ‘data_out1’ through the first to third repeaters 10 to 30. At this time, a data line, which outputs the first input data ‘data_in1’ as the first output data ‘data_out1’, is referred to as a first data line.
A second input data ‘data_in2’ is output as a second output data ‘data_out2’ through the fourth to sixth repeaters 40 to 60. At this time, a data line, which outputs the second input data ‘data_in2’ as the second output data ‘data_out2’, is referred to as a second data line.
The higher the integrated degree of the semiconductor memory apparatus, the narrower the interval between the first data line and the second data line becomes, such that cross-talk noise between the first data line and the second data line occurs.
A case when a change in a voltage level is the same in the first data line and the second data line will be described. For example, assume that data transmitted to the second repeater 20 through the first repeater 10 are transitioned from a high level to a low level. Moreover, assume that data transmitted from the fourth repeater 40 to the fifth repeater 50 are transitioned from a high level to a low level.
Since there is a parasitic capacitance between the first data line and the second data line, when the first data line (between the first repeater 10 and the second repeater 20) is transitioned from a high level to a low level, the change in the same voltage level also occurs in the second data line (between the fourth repeater 40 and the fifth repeater 50).
In contrast, when the second data line (between the fourth repeater 40 and the fifth repeater 50) is transitioned from a high level to a low level, the change in the same voltage level also occurs in the first data line (between the first repeater 10 and the second repeater 20).
The change in the same voltage level also occurs in the data line between the second repeater 20 and the third repeater 30 and the data line between the fifth repeater 50 and the sixth repeater 60.
Consequently, when the data having the same level are transmitted through the first data line and the second data line, the transition of the data occurs earlier than a normal case (jitter component occurs in data).
A case when a change in a voltage level is different in the first data line and the second data line will be described. For example, assume that data transmitted to the second repeater 20 through the first repeater 10 are transitioned from a high level to a low level. Meanwhile, assume that data transmitted from the fourth repeater 40 to the fifth repeater 50 are transitioned from a low level to a high level.
Since there is a parasitic capacitance between the first data line and the second data line, when the first data line (between the first repeater 10 and the second repeater 20) is transitioned from a high level to a low level, the change in the same voltage level also occurs in the second data line (between the fourth repeater 40 and the fifth repeater 50).
In contrast, when the second data line (between the fourth repeater 40 and the fifth repeater 50) is transitioned from a low level to a high level, the change in the same voltage level also occurs in the first data line (between the first repeater 10 and the second repeater 20).
The change in the same voltage level also occurs in the data line between the second repeater 20 and the third repeater 30 and the data line between the fifth repeater 50 and the sixth repeater 60.
Consequently, when data having a different voltage level are transmitted through the first data line and the second data line, the transition of data occurs later than a normal case (jitter components occur in data).